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Abstract
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In this paper, a trans-conductance amplifier based on Common Mode Rejection Ratio
(CMRR) enhancement block is presented. The proposed block is capable of eliminating
common mode signals at input stage. This feature improves the gain and CMRR of the
amplifier substantially. The Cascode structure is also eliminated in proposed architecture,
which resulted in favorably reduced power consumption due to low supply voltage
requirements. The presented OTA is simulated in 180nm CMOS technology at Cadence
Spectre environment with 1.5 v supply voltage proving it appropriate for low-voltage
applications. The bias current of the proposed circuit is very low value of 3.9 μA. Gain
and phase margin for this block are achieved to be 83.96 dB and 61.68 degree,
respectively. These results achieved while the circuit drive a 5pF load at its output. The
power consumption of the proposed amplifier is interestingly very low value of 5.9 μW
which makes the block suitable for low-power applications.
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